This paper proposes a new technique and design methodology on a transformer-based Class-E\ncomplementarymetal-oxide-semiconductor (CMOS) power amplifier (PA)with only one transformer and\ntwo capacitors in the load network. An analysis of this amplifier is presented together with an accurate\nand simple design procedure. The experimental results are in good agreement with the theoretical\nanalysis. The following performance parameters are determined for optimum operation: The current\nand voltage waveform, the peak value of drain current and drain-to-source voltage, the output power,\nthe efficiency and the component values of the load network are determined to be essential for optimum\noperation. The measured drain efficiency (DE) and power-added efficiency (PAE) is over 70% with\n10-dBm output power at 2.4 GHz, using a 65 nm CMOS process technology.
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